Single D-Type Positive Edge-Triggered Flip-Flop with Clear and Preset, 74LVC1G74XSMS8G P2P 74LVC1G74DP.
74LVC1G74XSMS8G
74LVC1G74XSMS8G.pdf
74LVC1G74XSMS8G.pdfFEATURES
• Wide Supply Voltage Range: 1.65V to 5.5V
• Inputs Accept Voltages Higher than the Supply
Voltage
• +32mA/-32mA Output Current
• Outputs in High-Impedance State when VCC = 0V
• -40℃ to +125℃ Operating Temperature Range
• Available in Green VSSOP-8, XTDFN-1.4×1-8L
and MSOP-8(S) Packages
PIN CONFIGUTION
优势替代
FEATURES
• Wide supply voltage range from 1.65 V to 5.5V
• Overvoltage tolerant inputs to 5.5V
• High noise immunity
• ±24 mA output drive (VCC = 3.0V)
• CMOS low power consumption
• Direct interface with TTL levels
• IOFF circuitry provides partial Power-down mode operation
• Latch-up performance exceeds 250mA
• Complies with JEDEC standard:
• JESD8-7 (1.65 V to 1.95 V)
• JESD8-5 (2.3 V to 2.7 V)
• JESD8-B/JESD36 (2.7 V to 3.6 V)
• ESD protection:
• HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000V
• CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000V
• Multiple package options
• Specified from -40°C to +85°C and -40°C to +125°C
PIN CONFIGUTION
