Dual D-Type Positive Edge-Triggered Flip-Flop with Set and Reset,74LVC74XTS14GTR-Replace-74LVC74APW-118.
74LVC74
74LVC74.pdf
74LVC74.pdfFEATURES
• 5V Tolerant Inputs for Interfacing with 5V Logic
• Wide Supply Voltage Range: 1.2V to 3.6V
• CMOS Low Power Consumption
• Direct Interface with TTL Levels
• -40℃ to +125℃ Operating Temperature Range
• Available in a Green TSSOP-14 Package
PIN CONFIGUTION
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FEATURES
• 5 V tolerant inputs for interlacing with 5 V logic
• Wide supply voltage range from 1.2 V to 3.6 V
• CMOS low power consumption
• Direct interface with TTL levels
• Complies with JEDEC standard:
• JESD8-7A (1.65 V to 1.95 V)
• JESD8-5A (2.3 V to 2.7 V)
• JESD8-C/JESD36 (2.7 V to 3.6 V)
• ESD protection:
• HBM JESD22-A114F exceeds 2000 V
• MM JESD22-A115-B exceeds 200 V
• CDM JESD22-C101E exceeds 1000 V
• Multiple package options
• Specified from -40 °C to +85 °C and -40 °C to +125 °C
PIN CONFIGUTION
