3.3V, Quad Buffer/Line Driverwith 3-State Outputs, 74LVTH125 P2P 74LVC125APW-118.
74LVTH125
74LVTH125.pdf
74LVTH125.pdfFEATURES
• Quad Bus Interface
• 3-State Buffers
• Output Capability: +64mA/-32mA
• TTL Input and Output Switching Levels
• Input and Output Interface Capability to Systems at 5V Supply
• Bus Hold on Data Inputs Eliminates the Need for External
Pull-Up/Pull-Down Resistors
• Live Insertion and Extraction Permitted
• Power-Up 3-State
• No Bus Current Loading When Output is Tied to 5V Bus
• -40℃ to +125℃ Operating Temperature Range
• Available in a Green SOIC-14 Package
PIN CONFIGUTION
优势替代
FEATURES
• Overvoltage tolerant inputs to 5.5 V
• Wide supply voltage range from 1.2 V to 3.6 V
• CMOS low power consumption
• Direct interface with TTL levels
• Complies with JEDEC standard:
• JESD8-7A (1.65 V to 1.95 V)
• JESD8-5A (2.3 V to 2.7 V)
• JESD8-C/JESD36 (2.7 V to 3.6 V)
• IOFF circuitry provides partial Power-down mode operation
• ESD protection:
• HBM JESD22-A114F exceeds 2000 V
• MM JESD22-A115-B exceeds 200 V
• CDM JESD22-C101E exceeds 1000 V
• Multiple package options
• Specified from -40 °C to +85 °C and -40 °C to +125 °C
PIN CONFIGUTION
