• 16bit edge triggered flip-flop

• 3 state buffers

• Output capability: 

    64 mA and 32 mA 

• Wide supply voltage range from 2.7 to 3.6 V 

• Overvoltage tolerant inputs to 5.5 V 

• BiCMOS high speed and output drive

• Direct interface with TTL levels 

• Input and output interface capability to systems at 5 V supply

• Bus hold data inputs eliminate the need for external pull up

   resistors to hold unused inputs. (74LVTH16374A only)

• Live insertion and extraction permitted

• Power-up reset 

• Powerup 3 state 

• No bus current loading when output is tied to 5 V bus

• I_OFF circuitry provides partial Power-down mode operation 

• Latch up performance exceeds 500 mA per JESD 78 Class II Level B

• Complies with JEDEC standard JESD8C (2.7 V to 3.6 V)

• ESD protection: 

   HBM JESD22-A114F exceeds 2000 V 

   MM JESD22-A115-A exceeds 200 V

• Specified from 40 °C to 85 °C