Dual 5A, High-Speed, Low-Side Gate Driver with Negative Input Voltage Capability, P2P UCC27524.
FEATURES

• Two Independent Gate Drive Channels

• 5A Source and 5A Sink Peak Currents

• Wide Supply Voltage Range: 4.5V to 18V

• TTL and CMOS Compatible Logic Threshold

• Logic Levels Independent of Supply Voltage

• Hysteretic Input Logic for High Noise Immunity

• Outputs Held Low When Inputs are Floating

• Fast Propagation Delays: 18ns (TYP)

• Fast Rise Time: 7ns (TYP)

• Fast Fall Time: 7ns (TYP)

• Ringing Suppression

• Negative Voltage Capability on INx Pins:

  -10V when (VDD - VINx) ≤ 20V

• Negative Voltage Capability on ENx Pins:

  -10V when (VDD - VENx) ≤ 20V 

• Negative Voltage Capability on OUTx Pin:

  -2V (Pulse < 200ns) 

• Comprehensive Protection Features

     Thermal Shutdown Protection

     Under-Voltage Lockout

     Short-Circuit Protection

• -40℃ to +125℃ Operating Temperature Range

• Available in Green SOIC-8, MSOP-8 (Exposed 

  Pad) and TDFN-3×3-8L Packages

PIN CONFIGUTION
优势替代
UCC27524 UCC27524.pdf

No.11530

FEATURES

• Industry-Standard Pinout

• Two Independent Gate-Drive Channels

• 5-A Peak Source and Sink-Drive Current

• Independent-Enable Function for Each Output

• TTL and CMOS Compatible Logic Threshold

• Independent of Supply Voltage

• Hysteretic-Logic Thresholds for High Noise Immunity

• Inputs and Enable Pin-Voltage Levels 

  Not Restricted by VDD Pin Bias Supply Voltage

• 4.5-V to 18-V Single-Supply Range

• Outputs Held Low During VDD-UVLO, (Ensures 

  Glitch-Free Operation at Power up and Power Down)

• Fast Propagation Delays (13-ns Typical)

• Fast Rise and Fall Times (7-ns and 6-ns Typical)

• 1-ns Typical Delay Matching Between Two Channels

• Two Outputs are in Parallel for Higher Drive Current

• Outputs Held Low When Inputs Floating

• PDIP (8), SOIC (8), MSOP (8) PowerPAD™ and

• 3-mm × 3-mm WSON-8 Package Options

• Operating Temperature Range of –40°C to 140°C





PIN CONFIGUTION
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