● 2-Bit Bidirectional Translator for SDA and SCL Lines in 

   Mixed-Mode I2C Applications

● I2C and SMBus Compatible

● Less than 5.5ns Propagation Delay to Accommodate Standard-Mode 

   and Fast-Mode I2C Devices and Multiple Masters

● Allows Voltage-Level Translator Between

   1.2V VREF1 and 1.8V, 2.5V, 3.3V, or 5V VREF2

   1.8V VREF1 and 2.5V, 3.3V, or 5V VREF2

   2.5V VREF1 and 3.3V or 5V VREF2

   3.3V VREF1 and 5V VREF2

● Provides Bidirectional Voltage Translation with No Direction Pin

● Low 3.5Ω ON-State Connection Between Input and Output Ports

   Provides Less Signal Distortion

● Open-Drain I2C I/O Ports (SCL1, SDA1, SCL2, and SDA2)

● 5V Tolerant I2C I/O Ports to Support Mixed-Mode Signal Operation

● High-Impedance SCL1, SDA1, SCL2, and SDA2 Pins for EN = Low

● Lock-Up-Free Operation for Isolation When EN = Low

● Flow-Through Pinout for Ease of Printed Circuit Board Trace Routing

● Available in Green SOT-23-8 and XTDFN-1.4×1-8L Packages

This dual bidirectional I2C and SMBus voltage-level translator, with an enable (EN) input, is operational from 1.2V to 3.3V VREF1 and 1.8V to 5.5V VREF2. The SGM4551 allows bidirectional voltage translation between 1.2V and 5V, without the use of a direction pin. The low ON-state resistance (RON) of the switch allows connections to be made with minimal propagation delay. When EN is high, the translator switch is on, and the SCL1 and SDA1 I/Os are connected to the SCL2 and SDA2 I/Os, respectively, allowing bidirectional data flow between ports. When EN is low, the translator switch is off, and a high-impedance state exists between ports.

In I2C applications, the bus capacitance limit of 400pF restricts the number of devices and bus length. Using the SGM4551 enables the system designer to isolate two halves of a bus; thus, more I2C devices or longer trace length can be accommodated.

The SGM4551 also can be used to run two buses, one at 400kHz operating frequency and the other at 100kHz operating frequency. If the two buses are operating at different frequencies, the 100kHz bus must be isolated when the 400kHz operation of the other bus is required. If the master is running at 400kHz, the maximum system operating frequency may be less than 400kHz because of the delays added by the repeater.