74LVTH16373.pdf• 16-Bit Transparent Latch
• 3-State Buffers
• Output Capability: +64mA/-32mA
• TTL Input and Output Switching Levels
• Input and Output Interface Capability to
Systems at 5V Supply
• Bus Hold on Data Inputs Eliminates
the Need for External Pull-Up/Pull-Down Resistors
• Live Insertion and Extraction Permitted
• Power-Up Reset
• Power-Up 3-State
• No Bus Current Loading When Output is Tied to 5V Bus
• -40℃ to +125℃ Operating Temperature Range
• Available in a Green TSSOP-48 Package
• 16-bit transparent latch
• 3-state buffers
• Wide supply voltage range from 2.7 to 3.6 V
• BiCMOS high speed and output drive
• Output capability: +64 mA/–32 mA
• Direct interface with TTL levels
• Overvoltage tolerant inputs to 5.5 V
• Bus-hold data inputs eliminate the
need for external pull-up resistors to hold unused inputs
• Live insertion/extraction permitted
• Power-up reset
• Power-up 3-state
• No bus current loading when output is tied to 5 V bus
• IOFF circuitry provides partial Power-down mode operation
• Latch-up performance exceeds 500 mA per
JESD 78 Class II Level B
• Complies with JEDEC standard JESD8C (2.7 V to 3.6 V)
• ESD protection:
• HBM: JESD22-A114F exceeds 2000 V
• MM: JESD22-A115-A exceeds 200 V
• Specified from -40 °C to 85 °C
